1. Field of the Invention
The present invention relates to a solid state image pickup device used for a scanner, a video camera and a digital still camera etc.
2. Related Background Art
In recent years, a solid state image pickup device called a CMOS sensor which utilizes a CMOS process has been catching attention. Due to their readiness for mixed loading of peripheral circuits, low-voltage drive and the like, CMOS sensors are expected for utility, in particular, to mobile information apparatuses. On the other hand, performances required for a solid state image pickup device is enhanced, and multiplication of pixels and miniaturization are regarded as indispensable problems.
Solid state image pickup devices have no choice but to undergo reduction in pixel size in case of undergoing multiplication of pixels. Reduction in pixel size will result in reduction in luminous quantity coming into a pixel. Drop of sensitivity worsens the S/N ratio to deteriorate image quality. Therefore, in case of reducing the pixel size, it will become a problem how to maintain a high level of sensitivity. As a technique to maintain a high level of sensitivity, a method of forming an on-chip micro lens above (more specifically, at the uppermost part of) a photo-detect part (photodiode) which configures a pixel is known.
However, with further fining of pixels, necessity of further improvement of sensitivity has arisen. Only forming an on-chip micro lens as described above at the uppermost part, it has become difficult to derive sufficient light-condensing efficiency. Therefore, in order to enhance light-condensing efficiency further, inner lens structure with a lens to be formed not only at the uppermost part of a lamination structure but also in its inside is proposed (see U.S. Pat. No. 5,796,154 and U.S. Pat. No. 6,030,852). This inner lens is formed in an inter-layer film immediately above a photo-detect part which implements photoelectric conversion. Likewise the on-chip micro lens, the incident light is refracted on the interface at either the upper surface side or the lower surface side of the inner lens and lead to the photodetect part. In case of using an inner lens and an on-chip micro lens at the same time, the light condensed by the on-chip lens can be further condensed with the inner lens so that light-condensing efficiency as a whole of a solid state image pickup device can be further enhanced.
FIG. 13 shows a schematic configuration of a MOS-type sensor to which a solid state image pickup device comprising the above described inner lens is applied. This MOS-type sensor includes the following configurations. Reference numeral 100 denotes a sensor array with a plurality of photoelectric conversion elements 110 arranged two-dimensionally. Reference numeral 120 denotes a vertical shift register circuit which selects the photoelectric conversion elements 110 on a line-by-line basis. Reference numeral 130 denotes line memory circuits including signal components retaining capacitance Cts and reset components retaining capacitance Ctn respectively retaining signal components (S) and reset (noise) components (N) of the photoelectric conversion elements 110 selected with the vertical shift register circuit 120. Reference numeral 140 denotes a horizontal shift register circuit which selects two pieces of data simultaneously at a time from the signal data in a line retained in the line memory circuit 130. Reference numerals 150a and 150b denote S-N reading circuits which amplify and output difference between the signal components (S) and the reset components (N) on the data simultaneously selected with the horizontal shift register circuit 140.
The S-N reading circuit 150a has an input terminal to which an S-common output line Ch1s is connected and the other input terminal to which an N-common output line Ch1n is connected. The S-N reading circuit 150b has an input terminal to which an S-common output line Ch2s is connected and the other input terminal to which an N-common output line Ch2n is connected. These N-common output lines Ch1n and Ch2n as well as S-common output lines Ch1s and Ch2s are common out lines 160.
To the S-common output line Ch1s, lines including the retaining capacitor Cts of the photoelectric conversion elements 110 on the odd rows are connected commonly. To the N-common output line Ch1n, lines including the retaining capacitance Ctn of the photoelectric conversion elements 110 on the odd rows are connected commonly. To the S-common output line Ch2s, lines including the retaining capacitor Ctn of the photoelectric conversion elements 110 on the even rows are connected commonly. To the N-common output line Ch2n, lines including the retaining capacitor Cts of the photoelectric conversion elements 110 on the even row are connected commonly.
Reading of data from the line memory circuit 130 to the common output line 160 is determined by the following relationship of capacitance. One is wiring capacitance that arises between retaining capacitance Ct included in the line memory circuit 130 and the common output line 160 mainly at the ground point. The other is capacitance Ch being source-gate in-between and source-back gate in-between capacitance of a MOS switch connected to the common output line 160. And according to the gain determined with these capacitance division proportion (Ct/(Ct+Ch)), reading is implemented. In each of the S-N reading circuits 150a and 150b, a signal charge (S) is read to the S-common output line according to the capacitance division proportion gain. Likewise, to the N-common output line, a reset component (N) is read according to the capacitance division proportion gain and a difference signal (Ax((Cts/(Cts+Chs)Vs−Ctn/(Ctn+Chn)Vn)) is outputted. Here, reference character A denotes amplifying ratio of the amplifier. According to this S-N reading, picking up difference signals, the noise components (fixed pattern noise arising at pixels) included in signal charges are cancelled.
However, in the image pickup device comprising the above described conventional inner lens, there is a problem as follows.
FIGS. 14A to 14C show a procedure of forming an inner lens. An inner lens is generally formed with procedure as follows. At first, on a semiconductor substrate 200, an element separating area 201, a photodiode area 202, an insulating film 203 and a shielding film 204 are formed with a predetermined order and the surface (the upper surface of the insulating film 203) is flattened. Subsequently, on the flattened surface, an inner lens material film 205 made of SiN, SiON or SiO2 is formed with the CVD method (chemical vapor depositing method), and moreover thereon etching masks 206 are formed with the photolithographic steps (see photograph 14A). These etching masks 206 are masks for forming inner lenses in the inner lens material film 205, the masked parts are arranged to shape islands so as to be located immediately above each photodiode area 202.
Subsequently, the etching masks 206 undergo reflow with heat processing so as to make the masked parts into a convex shape 206a being substantially the same as a shape of objective inner lens (see FIG. 14(b)). In addition, introducing etching gas selected from the group consisting of CF4, CHF3, O2, Ar, He and the like, the inner lens forming film 205 in its entirety undergoes gas etching and thereby the convex shape 206a of the etching mask 206 is transferred to the inner lens material film 205 (see FIG. 14C). Thus, the inner lens 207 is derived. Thereafter, a flattened film (insulating film) is formed, and thereon a color filter layer or micro lenses are appropriately formed.
In the step of forming the above described inner lens, since each inner lens is formed on each photoelectric conversion element 110 of the sensor arrays 100, the inner lens forming film 205 is formed over the entire area of the sensor arrays 100 (photoelectric conversion area). In the vicinity of the outer peripheral portion of the inner lens forming film 205 (near the boundary to the area where no inner lens is formed), there is dispersion in conditions at the time of gas etching. Therefore, there is a case where the size and the dielectric constant of the inner lens formed in the vicinity of the outer peripheral portion may differ. For example, in the vicinity of the outer peripheral portion of the inner layer forming film 205, supply of etching gas will become uneven to give rise to dispersion in the size of the convex shape. In addition, the plasma density in the vicinity of the outer peripheral portion of the inner layer forming film 205 differs from that of the center part thereof. Thereby, the plasma damage in the vicinity of the outer peripheral portion will differ from that in the center part to give rise to dispersion in the dielectric constant. Thus if there exists dispersion in the size and the dielectric constant of the inner lenses, efficiency of condensing light to the photoelectric conversion element 110 (photodiode area 202) will differ on sites to give rise to dispersion in optical output and a drop of sensitivity.
Here, the problems with dispersion in optical output and a drop of sensitivity described above can be solved by expanding the range of forming the inner lens material film 205 so as to cause the inner lenses in the vicinity of the outer peripheral portion which will give rise to dispersion in the size and the dielectric constant of the inner lenses to depart from the photoelectric conversion area. Specifically, the range of forming the inner lens material film 205 is expanded from the photoelectric conversion area to the peripheral portions. The width to be expanded is 1 pixel or more, and more desirably around 5 to 10 pixels. According to this configuration, the inner lenses formed in the peripheral portions of the photoelectric conversion area are treated as only dummy inner lenses which have no object to condense lights, and therefore will not give any problem even if the size of the lens and the dielectric constant be in dispersion. In addition, in the photoelectric conversion area, the inner lenses having approximately the same size of lenses and dielectric constant can be formed and an objective light-condensing efficiency will become attainable. However, in this case, the problems as follows will arise.
Since in the MOS sensor shown in FIG. 13, the common output line 160 is normally provided in the peripheral portion of the photoelectric conversion area, there is a case where the dummy inner lenses are located immediately above or immediately below the common output lines. Here, the case where the dummy inner lenses are formed on the common output lines will be considered. FIG. 15 is a conceptual plan view of a CMOS aria sensor in case of forming dummy lenses on the common output lines and FIG. 16 is a schematic sectional view along the 16-16 line in FIG. 15.
With reference to FIG. 15, at both sides of the photoelectric conversion area 300 where the photoelectric conversion elements 110 of the sensor arrays 100 are formed, common output line forming areas 301a and 301b are arranged. In the common output line forming areas 301a and 301b, an S common output line Ch1s and an N common output line Ch1n respectively connected to inputs of an S-N reading circuit 150a and an S common output line Ch2s and an N common output line Ch2n respectively connected to both inputs of an S-N reading circuit 150b are respectively formed. The inner lens forming area 302 where the inner lenses and the dummy inner lenses are formed is formed over the range including the entire area of the photoelectric conversion area 300 and its peripheral area, and the outer peripheral portion of the inner lens forming area 302 overlaps with the areas 301a and 301b where the common output lines are formed.
As shown in FIG. 16, in the photoelectric conversion area 300, inner lenses 207 are formed immediately above the photodiode area 202. In the area other than the photoelectric conversion area 300, that is, in the dummy area, the dummy inner lenses 207a are formed in the same pitch as for the inner lenses 207, and in the area corresponding with the common output line forming area 301a, the wiring layers 208a and 208b respectively corresponding with the common output lines Ch1s and Ch1n are formed. Below the wiring layers 208a and 208b, further other wiring layers 209a and 209b are formed. Although not shown in FIG. 16, in the area corresponding with the common output line forming area 301a in the dummy area, wiring corresponding with the common output lines Ch2s and Ch2n is formed as well.
In case of the above described configuration, lines of electric force e as shown in FIG. 17 arise in the span to the wiring layers 208a and 208b. The pitch for the wiring layers 208a and 208b is set irrelevant to the pitch for the dummy inner lens 207a. Therefore, the area where a dummy inner lens 207a overlaps with the wiring layer 208a differs from the area where a dummy inner lens 207a overlaps with the wiring layer 208b. Thereby, the coupling capacitance (density of line of electric force e) arising between the wiring layer 208a and another wiring differs from the coupling capacitance (density of line of electric force e) arising between the wiring layer 208b and another wiring. The reason thereof is that lines of electric force are amplified by a dummy inner lens with a high dielectric constant and different pitch will result in a difference in amplifying percentage.
There is a case where the wiring layer 208a (common output line Ch1s) being the S-common output line corresponding with the signal component (S) differs from the wiring layer 208b (common output line Ch1n) being the N-common output line corresponding with the reset component (N) in coupling capacitance respectively corresponding with other wiring layers. Then, the noise level in the input of the S-N reading circuit 150a from the S-common output line will differ from that from the N-common output line. Therefore, the noise that has occurred in the S-common output line and the nose that has occurred in the N-common output line will become unable to be completely cancelled. Therefore, the output of the S-N reading circuit 150a will include noise. Likewise noise problems will arise also in the S-N reading circuit 150b. 
The above described coupling capacitance will become a problem in a reading circuit other than the S-N reading circuit. Specifically, that is the case of having a reading circuit comprising a plurality of common output lines supplied with the signal component from each photoelectric conversion element (S) on a row-by-row basis and being configured so as to amplify the signal component (S) supplied to each common output line. In this case, when the above described coupling capacitance arises, the signal level outputted through each common output line will give rise to dispersion, consequently making it impossible to read the signal component correctly.
In addition, the above described coupling capacitance gives rise to attenuation of output of the reading circuit. Specifically, when coupling capacitance arises between the common output line and another wiring, capacitance Ch increases and consequently the capacitance division proportion (Ct/(Ct+Ch)) decreases so that the output of the S-N reading circuit (signal component (S)) attenuates. With attenuation of this output being large, correct reading of signal components (S) will become difficult and intensive sensitivity will not become retainable.
An object of the present invention is to solve the above described problems and to provide a solid state image pickup device capable of reading the signal components (S) correctly and an image pickup system with it.